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Preliminary Technical Data
FEATURES
Low offset voltage: 25 V max Low input offset drift: 0.1 V/C max High CMR: 120 dB min @ G = 100 Low noise: 0.7 V p-p from 0.01 Hz to 10 Hz Wide gain range: 1 to 10,000 Single-supply operation: +2.7 V to +5.5 V Rail-to-rail output Shutdown capability -40C to +125C operation
1.8 V to 5 V Auto-Zero, In-Amp with Shutdown AD8563
PIN CONFIGURATION
RGA 1 VINP 2 VCC 3 VO 4 VFB 5
10
RGB VINN GND VREF ENABLE
AD8563
TOP VIEW (Not to Scale)
9 8 7 6
Figure 1. 10-Lead MSOP
APPLICATIONS
Strain gauge Weigh scales Pressure sensors Laser diode control loops Portable medical instruments Thermocouple amplifiers
GENERAL DESCRIPTION
The AD85631 is a precision instrumentation amplifier featuring low noise, rail-to-rail output and a power-saving shutdown mode. The AD8563 also features low offset voltage and drift coupled with high common-mode rejection. In shutdown mode, the total supply current is reduced to less than 4 A. The AD8563 is capable of operating from 2.7 V to 5.5 V. With a low offset voltage of 30 V, an offset voltage drift of 0.5 V/C, and a voltage noise of only 1 V p-p (0.01 Hz to 10 Hz), the AD8563 is ideal for applications where error sources cannot be tolerated. Precision instrumentation, position and pressure sensors, medical instrumentation, and strain gauge amplifiers benefit from the low noise, low input bias current, and high common-mode rejection. The small footprint and low cost are ideal for high volume applications. The small package and low power consumption allow maximum channel density and minimum board size for space-critical equipment and portable systems. The AD8563 is specified over the industrial temperature range from -40C to +125C. The AD8563 is available in a Pb-free, 10-lead MSOP.
1
Patent pending.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c) 2006 Analog Devices, Inc. All rights reserved.
AD8563 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Pin Configuration............................................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution.................................................................................. 5 Typical Performance Characteristics ........ Error! Bookmark not defined. Theory of Operation ........................................................................ 6 High PSR and CMR ..................................................................... 6 1/f Noise Correction .................................................................... 6 Applications....................................................................................... 7
Preliminary Technical Data
Gain Selection (Gain-Setting Resistors).....................................7 Reference Connection ..................................................................7 Disable Function ...........................................................................7 Output Filtering.............................................................................7 Clock Feedthrough........................................................................7 Low Impedance Output................................................................7 Maximizing Performance Through Proper Layout ..................8 Power Supply Bypassing ...............................................................8 Input Overvoltage Protection ......................................................8 Capacitive Load Drive ..................................................................8 Circuit Diagrams/Connections ...................................................9 Outline Dimensions ....................................................................... 13 Ordering Guide............................................................................... 13
REVISION HISTORY
06/06--Revision PrA: Initial Version
Rev. PrA | Page 2 of 15
Preliminary Technical Data SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
AD8563
VCC = 5.0 V, VCM = 2.5 V, VREF = VCC/2, VIN = VINP - VINN, RLOAD = 10 k, TA = 25C, G = 100, unless specified. See Table 5 for gain setting resistor values. Temperature specifications guaranteed by characterization. Table 1.
Parameter INPUT CHARACTERISTICS Input Offset Voltage Symbol VOS Conditions G = 1000 G = 100 G = 10 G=1 G = 1000, -40C TA +125C G = 100, -40C TA +125C G = 10, -40C TA +125C G = 1, -40C TA +125C Input Bias Current Input Offset Current VREF Pin Current Input Operating Impedance Differential Common Mode Input Voltage Range Common-Mode Rejection IB -40C TA +125C IOS IREF 0.02 75||2 100||2 CMR G = 100, VCM = 0 V to 2.85 V G = 100, VCM = 0 V to 2.85 V, -40C TA +125C G = 10, VCM = 0 V to 2.85 V, -40C TA +125C G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V G = 10, VCM = 121.25 mV , VO = 0.075 V to 4.925 V G = 1, 10, 100, 1000, -40C TA +125C G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V G = 10, VCM = 121.25 mV, VO = 0.075 V to 4.925 V 0 120 105 100 3.0 140 140 120 0.25 0.5 50 0.006 0.035 4.1 Min Typ Max 25 25 50 350 0.1 0.1 0.3 3 1 2 2 1 Unit V V V V V/C V/C V/C V/C nA nA nA nA M||pF M||pF V dB dB % % ppm/C % FS % FS V V V mA dB dB mA mA A V V V p-p nV/Hz nV/Hz kHz kHz
vs. Temperature
VOS/ T
0.01 0.01 0.1 0.7 0.3
Gain Error Gain Drift Nonlinearity VREF Range OUTPUT CHARACTERISITICS Output Voltage High Output Voltage Low Short-Circuit Current POWER SUPPLY Power Supply Rejection Supply Current Supply Current Shutdown Mode ENABLE INPUTS Logic High Voltage Logic Low Voltage NOISE PERFORMANCE Voltage Noise Voltage Noise Density Internal Clock Frequency Signal Bandwidth1
1
0.9 VOH VOL ISC PSR ISY ISD 2.40 G = 100, VS = 2.7 V to 5.5 V, VCM = 0 V G = 10, VS = 2.7 V to 5.5 V, VCM = 0 V IO = 0 mA, VIN = 0 V -40C TA +125C 4.925
0.075 35 100 90 120 106 1.1 2
1.3 1.5 4
0.80 en p-p en f = 0.01 Hz to 10 Hz G = 100, f = 1 kHz G = 10, f = 1 kHz G = 1 to 1000 0.7 35 150 40 1
Higher bandwidths result in higher noise.
Rev. PrA | Page 3 of 15
AD8563
Preliminary Technical Data
VS = 2.7 V, VCM = -0 V, VREF = VS/2, VIN = VINP - VINN, RLOAD = 10 k, TA = 25C, G = 100, unless specified. See Table 5 for gain setting resistor values. Temperature specifications guaranteed by characterization. Table 2.
Parameter INPUT CHARACTERISTICS Input Offset Voltage Symbol VOS Conditions G = 1000 G = 100 G = 10 G=1 G = 1000, -40C TA +125C G = 100, -40C TA +125C G = 10, -40C TA +125C G = 1, -40C TA +125C Input Bias Current Input Offset Current VREF Pin Current Input Operating Impedance Differential Common Mode Input Voltage Range Common-Mode Rejection IB -40C TA +125C IOS IREF 0.02 75||2 100||2 CMR G = 100, VCM = 0 V to 0.7 V G = 100, VCM = 0 V to 0.7 V, -40C TA +125C G = 10, VCM = 0 V to 0.7 V G = 100, VCM =4.125 mV, VO = 0.075 V to 2.625 V G = 10, VCM = 41.25 mV, VO = 0.075 V to 2.625 V G = 1, 10, 100, 1000, -40C TA +125C G = 100, VCM = 4.125 mV, VO = 0.075 V to 2.625 V G = 10, VCM = 41.25 mV, VO = 0.075 V to 2.625 V 0 100 86 86 0.7 110 95 0.2 0.2 0.015 0.015 0.9 VOH VOL ISC PSR ISY ISD 1.4 0.5 en p-p en f = 0.01 Hz to 10 Hz G = 100, f = 1 kHz G = 10, f = 1 kHz G = 1 to 1000 1 45 180 40 1 G = 100, VS = 2.7 V to 5.5 V, VCM = 0 V IO = 0 mA, VIN = 0 V -40C TA +125C 2.625 0.075 5 100 120 0.9 2 1.8 Min Typ Max 30 30 60 500 0.5 0.5 3 10 1 2 2 1 Unit V V V V V/C V/C V/C V/C nA nA nA nA M||pF M||pF V dB dB % % ppm/C % FS % FS V V V mA dB mA mA A V V V p-p nV/Hz nV/Hz kHz kHz
Vs. Temperature
VOS/ T
0.1 0.1
0.3
Gain Error Gain Drift Nonlinearity VREF Range OUTPUT CHARACTERISITICS Output Voltage High Output Voltage Low Short-Circuit Current POWER SUPPLY Power Supply Rejection Supply Current Supply Current Shutdown Mode ENABLE INPUTS Logic High Voltage Logic Low Voltage NOISE PERFORMANCE Voltage Noise Voltage Noise Density Internal Clock Frequency Signal Bandwidth1
1
0.35 0.5 50
1.2 1.4 4
Higher bandwidths result in higher noise.
Rev. PrA | Page 4 of 15
Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Input Voltage Differential Input Voltage1 Output Short-Circuit Duration to GND Storage Temperature Range (RM Package) Operating Temperature Range Junction Temperature Range (RM Package) Lead Temperature Range (Soldering, 10 sec)
1
AD8563
Ratings 6V +VSUPPLY VSUPPLY Indefinite -65C to +150C -40C to +125C -65C to +150C 300C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4.
Package Type 10-Lead MSOP (RM)
1
Differential input voltage is limited to 5.0 V, the supply voltage, or whichever is less.
JA1 110
JC 32.2
Unit C/W
JA is specified for the nominal conditions, that is, JA is specified for the device soldered on a circuit board.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. PrA | Page 5 of 15
AD8563 THEORY OF OPERATION
The AD8563 is a precision current-mode correction instrumentation amplifier capable of single-supply operation. The current-mode correction topology results in excellent accuracy, without the need for trimmed resistors on the die. Figure 2 shows a simplified diagram illustrating the basic operation of the AD8563 (without correction). The circuit consists of a voltage-to-current amplifier (M1 to M6), followed by a current-to-voltage amplifier (R2 and A1). Application of a differential input voltage forces a current through External Resistor R1, resulting in conversion of the input voltage to a signal current. Transistor M3 to Transistor M6 transfer twice this signal current to the inverting input of the op amp A1. Amplifier A1 and External Resistor R2 form a current-tovoltage converter to produce a rail-to-rail output voltage at VOUT. Op amp A1 is a high precision, auto-zero amplifier. This amplifier preserves the performance of the autocorrecting, current-mode amplifier topology while offering the user a true voltage-in, voltage-out instrumentation amplifier. Offset errors are corrected internally. An external reference voltage is applied to the non-inverting input of A1 to set the output reference level. External Capacitor C2 filters out correction noise. The pin out of the AD8563 allows the user to access the signal current from the output of the voltage-to-current converter (Pin 5). The user can choose to use the AD8563 as a currentoutput device instead of a voltage-output device. See Figure 7 for circuit connections.
Preliminary Technical Data
HIGH PSR AND CMR
Common-mode rejection and power supply rejection indicate the amount that the offset voltage of an amplifier changes when its common-mode input voltage or power supply voltage changes. The auto-correction architecture of the AD8563 continuously corrects for offset errors, including those induced by changes in input or supply voltage, resulting in exceptional rejection performance. The continuous auto-correction provides great CMR and PSR performances over the entire operating temperature range (-40C to +125C). The parasitic resistance in series with R2 does not degrade CMR but causes a small gain error and a very small offset error. Therefore, an external buffer amplifier is not required to drive the VREF pin to maintain excellent CMR performance. This helps reduce system costs over conventional instrumentation amplifiers.
1/f NOISE CORRECTION
Flicker noise, also known as 1/f noise, is noise inherent in the physics of semiconductor devices and decreases 10 dB per decade. The 1/f corner frequency of an amplifier is the frequency at which the flicker noise is equal to the broadband noise of the amplifier. At lower frequencies, flicker noise dominates causing large errors in low frequency or dc applications. Flicker noise is effectively visible as a slowly varying offset error, which the auto-correction topology of the AD8563 reduces. This allows the AD8563 to have lower noise near dc than standard low noise instrumentation amplifiers.
Rev. PrA | Page 6 of 15
Preliminary Technical Data APPLICATIONS
GAIN SELECTION (GAIN-SETTING RESISTORS)
The gain of the AD8563 is set according to G = 2 x (R2/R1) (1)
AD8563
DISABLE FUNCTION
The AD8563 provides a shutdown function to conserve power when the device is not needed. Although there is a 1 A pull-up current on the ENABLE pin, Pin 6 should be connected to the positive supply for normal operation and to the negative supply to turn the device off. It is not recommended to leave Pin 6 floating. Turn-on time upon switching Pin 6 high is dominated by the output filters. When the device is disabled, the output becomes high impedance, enabling a multiplexing application of multiple AD8563 instrumentation amplifiers.
Table 5 lists the recommended resistor values. Resistor R1 must be at least 3.92 k for proper operation. The use of resistors larger than the recommended values results in higher offset and higher noise. Gain accuracy depends on the matching of R1 and R2. Any mismatch in resistor values results in a gain error. Resistor value errors due to drift will affect gain by the amount indicated by Equation 1. However, due to the current-mode operation of the AD8563, a mismatch in R1 and R2 does not degrade the CMR. Take care when selecting and positioning the gain setting resistors. The resistors should be made of the same material and package style. Surface-mount resistors are recommended. They should be positioned as close together as possible to minimize TC errors. To maintain good CMR vs. frequency, the parasitic capacitance on the R1 gain setting pins should be minimized and matched. This also helps maintain a low gain error at G < 10. If resistor trimming is required to set a precise gain, trim Resistor R2 only. Using a potentiometer for R1 degrades the amplifier's performance.
OUTPUT FILTERING
Filter Capacitor C2 is required to limit the amount of switching noise present at the output. The recommended bandwidth of the filter created by C2 and R2 is 1.4 kHz. The user should first select R1 and R2 based on the desired gain, then select C2 based on C2 = 1/(1400 x 2 x x R2) Addition of another single-pole RC filter of 1.4 kHz on the output (R3 and C3 in Figure 3 to Figure 5) is required for bandwidths greater than 10 Hz. These two filters produce an overall bandwidth of 1 kHz. When driving an ADC, the recommended values for the second filter are R3 = 100 and C3 = 1 F. This filter is required to achieve the specified performance. It also acts as an antialiasing filter for the ADC. If a sampling ADC is not being driven, the value of the capacitor can be reduced, but the filter frequency should remain unchanged. For applications with low bandwidths (<10 Hz), only the first filter is required. In this case, the high frequency noise from the auto-zero amplifier (output amplifier) is not filtered before the following stage. (2)
REFERENCE CONNECTION
Unlike traditional three op amp instrumentation amplifiers, parasitic resistance in series with VREF (Pin 7) does not degrade CMR performance. This allows the AD8563 to attain its extremely high CMR performance without the use of an external buffer amplifier to drive the VREF pin, which is required by industrystandard instrumentation amplifiers. This helps save valuable printed circuit board space and minimizes system costs. For optimal performance in single-supply applications, VREF should be set with a low noise precision voltage reference. However, for a lower system cost, the reference voltage can be set with a simple resistor voltage divider between the supply and ground (see Figure 3). This configuration results in degraded output offset performance if the resistors deviate from their ideal values. In dual-supply applications, VREF can be connected to ground. The VREF pin current is approximately 20 pA, and as a result, an external buffer is not required.
CLOCK FEEDTHROUGH
The AD8563 uses two synchronized clocks to perform the autocorrection. The input voltage-to-current amplifiers are corrected at 60 kHz. Trace amounts of these clock frequencies can be observed at the output. The amount of feedthrough is dependent upon the gain, because the auto-correction noise has an input and output referred term. The correction feedthrough is also dependent upon the values of the external filters R2/C2, and R3/C3.
LOW IMPEDANCE OUTPUT
For applications where a low output impedance is required, the circuit in Figure 5 should be used. This provides the same filtering performance as shown in the configuration in Figure 6.
Rev. PrA | Page 7 of 15
AD8563
MAXIMIZING PERFORMANCE THROUGH PROPER LAYOUT
To achieve the maximum performance of the AD8563, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board reduces surface moisture and provides a humidity barrier, reducing parasitic resistance on the board. Care must be taken to minimize parasitic capacitance on Pin 1 and Pin 10 (Resistor R1 connections). Traces from Pin 1 and Pin 10 to R1 should be kept short and symmetric. Excessive capacitance on these pins will result in a gain error. This effect is most prominent at low gains (G < 10). For high impedance sources, the PC board traces from the AD8563 inputs should be kept to a minimum to reduce input bias current errors.
Preliminary Technical Data
For single-supply operation, a 0.1 F surface-mount capacitor should be connected from the supply line to ground. All bypass capacitors should be positioned as close to the DUT supply pins as possible, especially the bypass capacitor between the supplies. Placement of the bypass capacitor on the back of the board directly under the DUT is preferred.
INPUT OVERVOLTAGE PROTECTION
All terminals of the AD8563 are protected against ESD. In the case of a dc overload voltage beyond either supply, a large current would flow directly through the ESD protection diodes. If such a condition should occur, an external resistor should be used in series with the inputs to limit current for voltages beyond the supply rails. The AD8563 can safely handle 5 mA of continuous current, resulting in an external resistor selection of REXT = (VIN - VS)/5 mA.
POWER SUPPLY BYPASSING
The AD8563 uses internally generated clock signals to perform the auto-correction. As a result, proper bypassing is necessary to achieve optimum performance. Inadequate or improper bypassing of the supply lines can lead to excessive noise and offset voltage. A 0.1 F surface-mount capacitor should be connected between the supply lines. This capacitor is necessary to minimize ripple from the correction clocks inside the IC. For dual-supply operation (see Figure 5), a 0.1 F (ceramic) surface-mount capacitor should be connected from each supply pin to ground.
CAPACITIVE LOAD DRIVE
The output buffer, Pin 4, can drive capacitive loads up to 100 pF.
VCC C2 I R1 I - IR1 IR1 = VINP M1 (VINP - VINN ) R1 M2 VINN M3 M4 I M5 M6 I - IR1 I + IR1 VBIAS VREF A1 2IR1 VOUT = VREF R2
+
2R2 R2
VINP - VINN
2I
2I
05474-030
EXTERNAL
Figure 2. Simplified AD8563 Schematic
Rev. PrA | Page 8 of 15
Preliminary Technical Data
CIRCUIT DIAGRAMS/CONNECTIONS
VS+
AD8563
0.1F GND 2 3 6
VIN+
+
1 R1 10 VIN- - 7 8
AD8553 AD8563
5 R2 C2 GND 100k VS+ 100k 0.1F
4
R3 100 C3 1F GND
VOUT
9
R3 AND C3 VALUES ARE RECOMMENDED TO DRIVE AN A/D CONVERTER
GND
Figure 3. Single-Supply Connection Diagram Using Voltage Divider Reference
VS+
0.1F GND VIN+ VS-
0.1F
2
+
3 6
1 R1 10 VIN- - 7 8
AD8563 AD8553
5 R2 C2 0.1F GND VS-
4
R3 100 C3 1F GND
VOUT
9
R3 AND C3 VALUES ARE RECOMMENDED TO DRIVE AN A/D CONVERTER
05474-031
Figure 4. Dual-Supply Connection Diagram
Rev. PrA | Page 9 of 15
05474-032
AD8563
VS+
Preliminary Technical Data
0.1F GND VIN+ VS-
0.1F
2
+
3 6
1 R1 10 VIN- - 7 8 GND 0.1F GND VS-
AD8553 AD8563
5
4
R3 100 C3 1F R2 GND
VOUT
C2
9
Figure 5. Dual-Supply Connection Diagram with Low Impedance Output
VS+
0.1F GND VIN+ 2 3 6
+
1 R1 10 VIN- - 7 8
AD8553 AD8563
5 R2 C2 VS-
4
R3 100 C3 1F GND
VOUT
9
R3 AND C3 VALUES ARE RECOMMENDED TO DRIVE AN A/D CONVERTER
1.0F
VCC
0.1F VIN GND
05474-035
VOUT
Figure 6. Dual-Supply Connection Diagram Using IC Voltage Reference
Rev. PrA | Page 10 of 15
05474-034
R3 AND C3 VALUES ARE RECOMMENDED TO DRIVE AN A/D CONVERTER
Preliminary Technical Data
VS+ 2 1 3 6 7 4 5 10 9_ 8 0.1F VS- NC (NO CONNECT) V IO = IN R1 AMMETER
05474-037
AD8563
VIN
+
R1
AD8553 AD8563
10k
A
Figure 7. Voltage-to-Current Converter, 0 A to 30 A Source
VS+ 2 + 1 3 7 R1 10 9_ 6 VREF = 2.5V 4 C2 5 8
05474-038
100 1F
AD8553 AD8563
A/D A/D CONVERTER
R2
Figure 8. Example of an AD8563 Driving a Converter at VS+ = 5 V
Rev. PrA | Page 11 of 15
AD8563
Preliminary Technical Data
VS+ LOGIC 2 + 1 3 7 R1 10 9_ 6 VREF 4 C2 5 8 VS- VS+ 2 + 1 3 7 R6 10 9_ 6 VREF 4 C3 5 8 R7 R8 100 1F VOUT R2 R3 100
AD8553 AD8563
AD8563 AD8553
VS+ 2 + 1 3 7 R11 10 9_ 6 VREF 4 C4 5 8 R12 R13 100
05474-039
AD8553 AD8563
Figure 9. Multiplexed Output
Table 5. Recommended External Component Values for Selected Gains
Desired Gain (V/V) 1 2 5 10 50 100 500 1000 R1 () 200 k 100 k 40.2 k 20 k 4.02 k 3.92 k 3.92 k 3.92 k R2 || C2 ( || F) 100 k || 1200p 100 k || 1200p 100 k || 1200p 100 k || 1200p 100 k || 1200p 196 k || 560p 976 k || 120p 1.96 M || 56p Calculated Gain 1 2 4.975 10 49.75 100 497.95 1000
Rev. PrA | Page 12 of 15
Preliminary Technical Data OUTLINE DIMENSIONS
3.10 3.00 2.90 3.10 3.00 2.90 PIN 1 0.50 BSC 0.95 0.85 0.75 0.15 0.05 0.33 0.17 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA 1.10 MAX 8 0 0.80 0.60 0.40
10 6
AD8563
1
5
5.15 4.90 4.65
SEATING PLANE
0.23 0.08
Figure 10. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters
ORDERING GUIDE
Model AD8563ARMZ-R21 AD8563ARMZ-REEL1
1
Temperature Range -40C to +125C -40C to +125C
Package Description 10-Lead MSOP 10-Lead MSOP
Package Option RM-10 RM-10
Branding A09 A09
Z = Pb-free part.
Rev. PrA | Page 13 of 15
AD8563 NOTES
Preliminary Technical Data
Rev. PrA | Page 14 of 15
Preliminary Technical Data NOTES
AD8563
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06202-0-6/06(PrA)
Rev. PrA | Page 15 of 15

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